This is huge for POET. Only POET has done this.
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Posted On: 07/01/2021 5:36:14 PM
This is huge for POET.
Only POET has done this.
The flip-chip assembly technique enables a true single-chip, fully integrated Optical Engine to be produced at wafer-scale, resulting in the lowest-cost, smallest-size 100G CWDM4 Optical Engine with a form factor of 9mm x 6mm, while including banks of four lasers, four monitor photodiodes, four high speed photodiodes, a multiplexer, demultiplexer, taps for power monitoring and features supporting a self-aligned fiber attach unit.
“Without being able to flip-chip the lasers, we would be unable to assemble Optical Engines at wafer-scale, which is the single most important driver of cost. Wafer-scale processing enables the production of high unit volumes at low incremental costs, ultimately allowing us to reduce the cost of building photonics devices by 25% to 40% compared to conventional approaches,” stated Suresh Venkatesan, Chairman and CEO of POET. “Following our successful demonstration of this flip-chip assembly process, POET can now readily incorporate these lasers and other active devices into derivative optical engine configurations, supporting data communications applications such as 200G CWDM4, 100G CWDM6, and 100G LR4, telecom applications such as 5G, as well as other applications that could benefit from the small size and low cost of our platform technology.”
Only POET has done this.
The flip-chip assembly technique enables a true single-chip, fully integrated Optical Engine to be produced at wafer-scale, resulting in the lowest-cost, smallest-size 100G CWDM4 Optical Engine with a form factor of 9mm x 6mm, while including banks of four lasers, four monitor photodiodes, four high speed photodiodes, a multiplexer, demultiplexer, taps for power monitoring and features supporting a self-aligned fiber attach unit.
“Without being able to flip-chip the lasers, we would be unable to assemble Optical Engines at wafer-scale, which is the single most important driver of cost. Wafer-scale processing enables the production of high unit volumes at low incremental costs, ultimately allowing us to reduce the cost of building photonics devices by 25% to 40% compared to conventional approaches,” stated Suresh Venkatesan, Chairman and CEO of POET. “Following our successful demonstration of this flip-chip assembly process, POET can now readily incorporate these lasers and other active devices into derivative optical engine configurations, supporting data communications applications such as 200G CWDM4, 100G CWDM6, and 100G LR4, telecom applications such as 5G, as well as other applications that could benefit from the small size and low cost of our platform technology.”
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