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Innovative Collaboration of Synopsys and Intel for Chip Design

Innovative Collaboration of Synopsys and Intel for Chip Design

Transformative Collaboration between Synopsys and Intel

In a groundbreaking partnership, Synopsys, Inc. (NASDAQ: SNPS) and Intel Foundry are collaborating to pave the way for the next generation of chip designs. This collaboration focuses on utilizing Intel's advanced 18A and 18A-P process technologies, which are set to revolutionize the landscape of semiconductor design and manufacturing.

Highlights of the Partnership

With the launch of production-ready digital and analog EDA flows for the Intel 18A process node, Synopsys is enabling designers to accelerate their development timelines. The advanced capabilities of these flows are designed for high-performance applications, filling the industry's need for speed and efficiency in chip creation. Additionally, their work on the Intel 18A-P technology enhances design capabilities, offering exceptional performance per watt (PPA) metrics.

Accelerating Design with Advanced Technologies

One of the standout features of this partnership is the optimized EDA reference flow that caters to the intricacies of 2.5D and 3D multi-die designs. Intel's EMIB-T advanced packaging technology is now supported by a robust EDA reference flow powered by the Synopsys 3DIC Compiler. This technology allows for efficient integration of multiple chips into singular systems, pushing the boundaries of performance and interconnect density.

Broad Portfolio and Innovation

To further support the industry's evolving needs, Synopsys boasts the broadest portfolio of high-performance and low-power IP. This extensive range is crucial for companies looking to meet tight deadlines while ensuring quality designs. Moreover, the new membership in the Intel Foundry Accelerator Design Services Alliance stands as a testament to their commitment to fostering innovation and accelerating adoption within the market.

Advancements in Design and EDA

Both companies are engaging in design co-optimization to ensure Synopsys' EDA flows are ready for Intel's forthcoming 14A-E technology. This proactive approach indicates a focus on providing customers with the tools necessary for the next wave of advanced-node designs, with heat and power efficiency taking center stage.

Future of AI and HPC Chips

The introduction of angstrom-level design processes, championed by Synopsys, plays a critical role in enhancing the capabilities of AI and high-performance computing (HPC) chips. With a wide array of IP solutions, including embedded memory and IO technologies, the change promises to deliver superior performance metrics essential for today’s demanding AI applications.

Enhancing the Ecosystem and Accelerating Adoption

As Synopsys strengthens its partnership with Intel, it is clear that both companies are dedicated to supporting multi-die chip designs. Their innovative approach is also visible in their decision to join the Intel Foundry Chiplet Alliance. This move further enables effective collaboration across various ecosystems, ensuring that customers can achieve optimal designs through shared resources and expertise.

The Vision Ahead

As Synopsys continues to lead in the realm of electronic design automation, it is simultaneously expanding its capabilities to support advanced chip designs. The synchronization of EDA tools with Intel’s cutting-edge technologies underlines a vision where innovation thrives, meeting the ever-changing demands of the semiconductor market.

Frequently Asked Questions

1. What is the main focus of the collaboration between Synopsys and Intel?

The collaboration primarily focuses on enhancing chip design processes using Intel's advanced 18A and 18A-P technologies.

2. How does Synopsys contribute to the speed of chip design?

Synopsys provides production-ready EDA flows that streamline the design process, improving speed and efficiency for designers.

3. What technologies are being utilized for multi-die designs?

Intel's EMIB-T advanced packaging technology, supported by Synopsys' 3DIC Compiler, is being utilized for efficient multi-die designs.

4. What advantages do the new IP portfolios offer?

The new IP portfolios provide solutions for a variety of applications, optimizing design performance and accelerating time-to-market.

5. How are Synopsys and Intel positioning themselves for the future?

Both companies are committed to advancing semiconductor technologies and are actively preparing for next-generation design processes, including engagement in design co-optimization for upcoming nodes.

About The Author

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