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SEMIFIVE and Synopsys Partner for Enhanced Chiplet Solutions

SEMIFIVE and Synopsys Partner for Enhanced Chiplet Solutions

SEMIFIVE Collaborates with Synopsys on Chiplet Technology

The Platform Helps Meet PPA Goals and Accelerate Time-to-Market

Recently, SEMIFIVE, an industry leader in custom silicon solutions, announced a partnership with Synopsys to create a state-of-the-art high-performance computing (HPC) platform. This platform is set to integrate SEMIFIVE's advanced CPU chiplet with an external I/O chiplet, paving the way for a unified architecture designed to elevate performance benchmarks. By leveraging this collaborative effort, SEMIFIVE aims to transform the semiconductor landscape, providing a flexible and cost-effective solution suitable for diverse high-performance computing applications.

Advantages of the HPC Chiplet Platform

Manufactured using innovative 4nm process technology, SEMIFIVE's CPU chiplet will incorporate essential Synopsys technologies such as the UCIe controller and various PHY IP solutions. This strategic integration is pivotal for enhancing SEMIFIVE's product offerings, which already enjoy notable success in the market, thanks to Synopsys' proven track record and silicon-proven IP solutions. The HPC chiplet platform is anticipated to streamline the design process, offering quicker turnaround times to clients while ensuring peak performance and cost efficiency—critical goals for any semiconductor enterprise.

Industry Impact and Future Prospects

According to Michael Posner, Vice President of IP Product Management at Synopsys, this partnership aims to support companies in adopting multi-die designs—a response to the escalating compute demands in high-performance environments. The synergy between Synopsys’ cutting-edge UCIe IP and SEMIFIVE’s rich SoC platform positions both companies to meet these evolving requirements effectively.

SEMIFIVE’s CEO, Brandon Cho, expressed optimism about the transformative potential of chiplet architecture, emphasizing that the collaboration with Synopsys is set to be instrumental in shaping the future of silicon design. By leveraging their advanced HPC chiplet platform, SEMIFIVE aspires to empower its clients to innovate and expedite their product launches, making significant inroads in their competitive markets.

About SEMIFIVE

SEMIFIVE is recognized for its groundbreaking platform-based approach to SoC design, collaborating closely with clients to streamline the transition of innovative concepts into practical, custom silicon solutions. The SoC platforms provided by SEMIFIVE serve as a robust foundation for upcoming chip designs, utilizing customizable domain-specific architectures and pre-validated key IP pools. Their comprehensive solutions encompass all facets from specification to actual implementation, ensuring rapid development with reduced costs and risks for pivotal applications, including data centers and AI-enabled IoT systems. In partnership with Samsung Foundry as a leading SAFE™ DSP partner, SEMIFIVE offers a complete solution for any SoC design requirement.

Frequently Asked Questions

What is the nature of SEMIFIVE's collaboration with Synopsys?

SEMIFIVE collaborates with Synopsys to develop an advanced chiplet platform integrating their CPU chiplet with a third-party I/O chiplet, focusing on performance and flexibility.

How does the HPC chiplet platform benefit customers?

The HPC chiplet platform enhances cost efficiency, optimizes performance, and significantly reduces time-to-market for high-performance computing solutions.

What technology is SEMIFIVE's CPU chiplet built on?

SEMIFIVE's CPU chiplet is manufactured using cutting-edge 4nm process technology, ensuring it meets the latest performance standards.

Who is the target audience for SEMIFIVE's HPC chiplet platform?

The platform is designed for companies requiring high-performance solutions, particularly those engaged in data center operations and AI-related applications.

What advantages do the UCIe IP solutions from Synopsys bring?

Synopsys’ UCIe IP solutions provide a proven framework that facilitates reliable and efficient multi-die designs, crucial for meeting modern computational needs.

About The Author

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