$GTCH new EDA (Electronic Design Automation) techn
Post# of 10140
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The Company’s research surrounding Delta layout migration and optimization tool is specifically geared for advanced nanometer nodes technologies, and is based on the company’s machine learning technology. It is aimed to migrate an entire integrated circuit data from one node.
Typically, an IC’s layout process migration involves vast amount of work due to the impact of process variation on the design geometrical, electrical rules, and reliability at the smaller node. The main aim for layout process migration is typically to attain higher silicon yield, improve the design’s performance, power management, and to achieve major cost reduction. When it comes to porting a microchip from one process to another, typically from a larger to a smaller one, there are many factors that have to go through massive changes, among them are device size/geometrical features, new specifications, process related electrical/physical rules and more.
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