September 2, 2014
POET Technologies and Synopsys Collaborate on Advanced Modeling of Planar Electrical Technology and Development of POET's First Process Design Kit
TORONTO, ONTARIO and STORRS, CONNECTICUT--(Marketwired - Sept. 2, 2014) - POET Technologies Inc. (TSX VENTURE
TK)(OTCQXOETF) ("the Company"
- developer of the planar opto-electronic technology (POET) platform for monolithic fabrication of integrated circuit devices containing both electronic and optical elements on a single semiconductor wafer - today announced a collaboration with Synopsys, Inc. -- a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems -- to develop an advanced model and first Process Design Kit (PDK) of POET's electrical devices (PET) targeting the 40-nm technology node widely used for highly integrated systems-on-chip (SoC).
Through this collaboration, POET Technologies will use Synopsys' TCAD toolset and services to continue to develop the PET and POET PDKs. The PET PDK milestone (MS-12) focuses on devices requiring only the electronic subset of the POET devices and processes. Mr. Daniel DeSimone, CTO noted: "Synopsys will provide expertise and services to the POET team, enabling us to expedite the design process. The Synopsys TCAD software toolset is well positioned for the POET PDK requirements."
The Synopsys toolset will be used for process technology development and design of nano-scale devices in POET's III-V compound semiconductor process. Devices include complementary HFET and HBT transistors with high electron mobility performance, including a thyristor with both optical and electrical operation. These devices will form the foundation of POET's technology that is able to integrate active optical circuitry, lasers, modulators, filters, detectors and electrical circuitry on a single die.
"POET Technologies III-V process and devices IP represent a significant innovation for our industry, and we look forward to the opportunity to work with the POET team on their first PDK," said Terry Ma, Vice President of Engineering for TCAD at Synopsys. "This collaboration with POET will combine the strengths of our TCAD modeling expertise and POET's innovative technologies to provide leading-edge semiconductor companies significant benefits for next-generation semiconductor designs."
The PET PDK and process offers lower cost and simpler process fab options for applications that do not require the full POET optical feature set. Due to the high mobility inherent in III-V materials, PET technology is predicted to deliver performance, which could be equivalent to 3 to 4 nodes ahead of mainstream technologies. Further performance and novel capabilities will be enabled by the incorporation of in-plane optical intra and inter-chip signaling capabilities within the electrical technology. The PET/PDK is scheduled to be available at the end of Q4 2014 and will allow POET to provide detailed design information to industry fab partners and customers. This will enable pre-semiconductor design evaluation to integrate optical, analog and digital functions together. PET-based electronic devices represent a breakthrough in performance and power efficiency.
Mr. Copetti concluded, "We are delighted to target a 40-nm technology node for our first PDK delivery. This is an aggressive target for our POET devices and process IP. This will demonstrate to the industry the significance and the strengths of POET compared to the performance and power efficiency of today's widely used technologies."
POET Technologies and Synopsys Collaborate on Advanced Modeling of Planar Electrical Technology and Development of POET's First Process Design Kit
TORONTO, ONTARIO and STORRS, CONNECTICUT--(Marketwired - Sept. 2, 2014) - POET Technologies Inc. (TSX VENTURE
TK)(OTCQXOETF) ("the Company" - developer of the planar opto-electronic technology (POET) platform for monolithic fabrication of integrated circuit devices containing both electronic and optical elements on a single semiconductor wafer - today announced a collaboration with Synopsys, Inc. -- a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems -- to develop an advanced model and first Process Design Kit (PDK) of POET's electrical devices (PET) targeting the 40-nm technology node widely used for highly integrated systems-on-chip (SoC). Through this collaboration, POET Technologies will use Synopsys' TCAD toolset and services to continue to develop the PET and POET PDKs. The PET PDK milestone (MS-12) focuses on devices requiring only the electronic subset of the POET devices and processes. Mr. Daniel DeSimone, CTO noted: "Synopsys will provide expertise and services to the POET team, enabling us to expedite the design process. The Synopsys TCAD software toolset is well positioned for the POET PDK requirements."
The Synopsys toolset will be used for process technology development and design of nano-scale devices in POET's III-V compound semiconductor process. Devices include complementary HFET and HBT transistors with high electron mobility performance, including a thyristor with both optical and electrical operation. These devices will form the foundation of POET's technology that is able to integrate active optical circuitry, lasers, modulators, filters, detectors and electrical circuitry on a single die.
"POET Technologies III-V process and devices IP represent a significant innovation for our industry, and we look forward to the opportunity to work with the POET team on their first PDK," said Terry Ma, Vice President of Engineering for TCAD at Synopsys. "This collaboration with POET will combine the strengths of our TCAD modeling expertise and POET's innovative technologies to provide leading-edge semiconductor companies significant benefits for next-generation semiconductor designs."
The PET PDK and process offers lower cost and simpler process fab options for applications that do not require the full POET optical feature set. Due to the high mobility inherent in III-V materials, PET technology is predicted to deliver performance, which could be equivalent to 3 to 4 nodes ahead of mainstream technologies. Further performance and novel capabilities will be enabled by the incorporation of in-plane optical intra and inter-chip signaling capabilities within the electrical technology. The PET/PDK is scheduled to be available at the end of Q4 2014 and will allow POET to provide detailed design information to industry fab partners and customers. This will enable pre-semiconductor design evaluation to integrate optical, analog and digital functions together. PET-based electronic devices represent a breakthrough in performance and power efficiency.
Mr. Copetti concluded, "We are delighted to target a 40-nm technology node for our first PDK delivery. This is an aggressive target for our POET devices and process IP. This will demonstrate to the industry the significance and the strengths of POET compared to the performance and power efficiency of today's widely used technologies."
