$GTCHD The solution suite will include design, verification and manufacturing analysis under one platform which eliminates the use of different EDS vendors and tool tools. The platform will take into consideration design requirements and perform area optimization for efficient silicon yield. The platform will also include design automation utilities, among them are high level synthesis, geometrical and electrical auto-correction features, along with interactive capabilities, enabling on-the-fly feedback and violation elimination. The platform will be consisted of wide variety of independent programs that will work in a full interoperability method, providing fabless IC design firms with the capability to design their chips under one design environment, both faster and cheaper.