$GTCH In the past decade the IC industry has experienced exponential improvements in design and manufacturing domains. As science continues to overcome physics and electrical obstacles, these barriers are constantly moving. An IC design flow comprises of stages which involve software tools that architect, capture, simulate and verify the IC’s correctness. These computer-aided-design (CAD), also called EDA (Electronic Design Automation) are key aspects in transforming product’s definition and circuit concepts into production-ready IC design. One of the must have tools is the Layout-Vs-Schematics computer program (also called LVS verification), which verifies the electrical connectivity of an IC layout against its schematic diagram. Mismatches mean a non-functional chip or wrong electrical functionalities. Typically, in custom and semi-custom IC layout styles, these corrections must be done manually which is a significant time-consuming process. GBT is researching to develop an LVS Auto-Correct computer program for IC layout electrical connectivity mismatch corrections. The system will read an IC’s schematic and layout data, compare their electrical connectivity and in case of mismatches detection, disconnect, and re-route creating a correct electrical connection. The system will take into consideration the process design rules, reliability constraints and DFM (Design for Manufacturing) aspects. GBT believes that such an automation tool will majorly reduce the overall IC’s design time and time to market.

https://www.benzinga.com/pressreleases/21/10/...and-better