$GTCH Dany Rittman, the Company’s CTO: “This type of system is a significant productivity enhancer tool within IC’s design flow and will majorly reduce the global layout design time and chip’s overall time to market factor. In addition, microchips will be able to be made smaller, which increase the silicon yield enabling much higher profit margin. Project’s design time will shrink and fabless IC design firms will be able to design more advanced chips in less time. We strongly believe that this technology will make a major impact in this arena and now working on a nonprovisional application as also on future development of such commercial EDA tool.”