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Innovative RISC-V Co-Emulation Solution Boosts Chip Development

Innovative RISC-V Co-Emulation Solution Boosts Chip Development

Introducing a Game-Changing Co-Emulation Solution for RISC-V

S2C, MachineWare, and Andes Technology have united to deliver an innovative co-emulation solution aimed at simplifying the intricacies of RISC-V chip design. This synergy brings together advanced virtual platforms and powerful CPU cores, facilitating a comprehensive framework for hardware and software co-verification, benefitting engineers in the field.

Understanding the Complexity of RISC-V Design

As the landscape of RISC-V chip design evolves, complexities have surged, making pre-silicon software development and system validation increasingly arduous. The proprietary co-emulation solution allows for a progressive verification approach, permitting hardware and software teams to collaborate seamlessly. This shift not only expedites development timelines but also mitigates project risks considerably.

MachineWare's SIM-V Platform

MachineWare plays a pivotal role by providing its SIM-V virtual platform, built on SystemC TLM-2.0, renowned for exceptional simulation speeds and extensive extensibility. This platform is designed to integrate proficiently with numerous third-party toolchains, enhancing debugging, testing, and coverage analysis processes.

One of SIM-V's standout features is its high simulation performance along with comprehensive support for RISC-V cores. With instruction-accurate reference models adhering to AndeStar V5 Instruction Set Architecture, including the RISC-V Vector extension, the platform allows designers to model, validate, and debug custom processor enhancements in an extensive system simulation environment. Lukas Jünger, CEO of MachineWare, highlights how this solution empowers customers to validate both hardware and software concurrently, driving quicker market introductions without sacrificing accuracy.

Andes Technology's High-Performance Cores

Andes Technology enriches the collaboration with its advanced CPU IP, featuring the multicast AndesCore™ AX46MPV. This processor boasts an 8-stage superscalar architecture and accommodates up to 16 cores, complemented by a sophisticated multi-level cache structure. Furthermore, it integrates a powerful Vector Processing Unit (VPU) capable of handling 1024-bit VLEN operations and dynamic customizations through Andes Custom Extension (ACE).

This CPU is exceptionally tailored for high-demand applications across diverse sectors, from data centers focusing on AI computations to Linux-capable edge AI platforms and high-performance MPUs playing vital roles in networking and storage.

S2C’s Role in Bridging Virtual and Physical Hardware

S2C’s expertise lies in linking the SIM-V virtual platform with tangible hardware, utilizing their Genesis Architect and Prodigy FPGA-based prototyping systems. This hybrid configuration runs CPU models in SIM-V, while peripheral subsystems operate at accelerated speeds on FPGA, interconnected through a high-speed transactional bridge. Such a framework provides an authentic system context capable of executing entire software stacks effectively.

Benefits of the Co-Emulation Solution

The co-emulation solution addresses critical developmental stages successfully, including:

  • Pre-silicon software development
  • Hardware/software co-verification
  • System performance analysis and tuning
  • Custom ISA extension development and debugging

According to Ying, VP of S2C, this collaboration facilitates swift time-to-market deliveries, reduces expenses, and ensures mature software readiness—all while providing cycle-accurate debugging and rapid execution capabilities. This joint effort underscores the imperative of collaborative development practices in achieving streamlined system outcomes.

Future Initiatives and Commitments

S2C, MachineWare, and Andes Technology remain steadfast in their commitment to refining verification methodologies while offering scalable, efficient development tools tailored for the RISC-V community. Their joint efforts focus on fortifying the ecosystem crucial for the advancement of next-gen RISC-V chip designs.

About MachineWare

Founded in Aachen, Germany, MachineWare GmbH is at the forefront of high-speed virtual prototyping solutions designed for pre-silicon validation and testing. Its renowned SIM-V platform excels in RISC-V simulation proficiency, empowering accurate modeling of sophisticated SoCs and customized ISA extensions for a variety of industries, encompassing automotive, telecommunications, and artificial intelligence.

About Andes Technology

As a prominent force and premier member of RISC-V International, Andes Technology (TWSE: 6533) propels the widespread use of RISC-V architecture globally. The company’s RISC-V processor IP portfolio spans ultra-efficient 32-bit CPUs to high-end 64-bit systems. With robust capabilities in vector processing and comprehensive certification in compliance with ISO 26262, Andes Technology is strategically positioned to catalyze innovations across various sectors.

About S2C

S2C is a prominent global supplier of FPGA prototyping solutions, holding a significant share in the market dedicated to SoC and ASIC designs. Established in 2003, the company has built a solid reputation with over 600 clients, including many leading semiconductor firms. Their dedicated team excels in fulfilling customers’ verification requirements, with operations spanning several global regions.

Frequently Asked Questions

What is RISC-V, and why is it significant for chip design?

RISC-V is an open standard instruction set architecture (ISA) that promotes innovation by allowing developers to create customized processors tailored for specific applications, significantly benefiting chip design.

What are the key advantages of this co-emulation solution?

The primary benefits include accelerated development cycles, reduced costs, enhanced debugging capabilities, and the ability to validate software and hardware in tandem.

Who are the main contributors to this solution?

The solution is a collaborative effort among S2C, MachineWare, and Andes Technology, each bringing their unique expertise to the project.

How does the SIM-V platform enhance developer performance?

SIM-V provides high simulation speeds and easy integration with third-party tools, enabling developers to debug, validate, and analyze their designs effectively.

What markets are being targeted with this co-emulation solution?

This solution is aimed at various sectors, including AI, automotive, communications, and data centers, addressing a wide range of application needs.

About The Author

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Investors Hangout is a leading online stock forum for financial discussion and learning, offering a wide range of free tools and resources. It draws in traders of all levels, who exchange market knowledge, investigate trading tactics, and keep an eye on industry developments in real time. Featuring financial articles, stock message boards, quotes, charts, company profiles, and live news updates. Through cooperative learning and a wealth of informational resources, it helps users from novices creating their first portfolios to experts honing their techniques. Join Investors Hangout today: https://investorshangout.com/

The content of this article is based on factual, publicly available information and does not represent legal, financial, or investment advice. Investors Hangout does not offer financial advice, and the author is not a licensed financial advisor. Consult a qualified advisor before making any financial or investment decisions based on this article. This article should not be considered advice to purchase, sell, or hold any securities or other investments. If any of the material provided here is inaccurate, please contact us for corrections.

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