Groundbreaking Achievement in Chiplet Connectivity
Alphawave Semi, a distinguished leader in high-speed connectivity and compute silicon, has made a substantial leap forward with the introduction of its new 64 Gbps Universal Chiplet Interconnect Express (UCIe™) Die-to-Die (D2D) IP Subsystem. This innovative system is designed to deliver unparalleled chiplet interconnect data rates, significantly elevating the standards for ultra-high-performance D2D connectivity within the technology sector.
Innovative Design Meets Industry Demands
The new 64 Gbps IP Subsystem follows the success of its predecessor, the Gen2 36 Gbps subsystem, and the pioneering Gen1 24 Gbps version. This advanced technology is now available in TSMC’s cutting-edge 3nm Technology, enhancing both standard and advanced packaging capabilities. With a proven record of success, Alphawave Semi positions itself at the forefront of the chiplet interconnect domain.
Transforming Bandwidth Density and Power Efficiency
Alphawave's Gen3 UCIe IP will redefine connectivity in various applications, achieving a remarkable bandwidth density exceeding 20 Tbps/mm while ensuring ultra-low power consumption and minimal latency. The system is versatile, supporting multiple protocols such as AXI-4, AXI-S, CXS, CHI, and CHI-C2C, aligning with the urgent market need for high-performance connectivity in areas like High-Performance Computing (HPC), data centers, and Artificial Intelligence (AI).
A Scalable Architecture for Future Growth
Designed to adhere to the latest UCIe™ Specification, this new architecture is scalable and includes advanced testability features, such as live health monitoring. These enhancements establish a robust foundation that promotes an open and interoperable chiplet ecosystem, paving the way for innovative applications and solutions across various technologies.
Versatile Use Cases for Modern Computing Needs
The UCIe D2D interconnects are not only adaptable but also essential for facilitating various standard and emerging chiplet connectivity scenarios. They can seamlessly link compute chiplets through UCIe's streaming capabilities, ensuring low-latency and coherent connections. Furthermore, these interconnects enable connections between compute and I/O chiplets using UCIe interfaces alongside PCIe, CXL, or Ethernet.
Advancing Optical Connectivity
One of the standout features of UCIe is its ability to leverage optical retimers, providing dependable, low-latency optical I/O links through sophisticated optical engine technologies. This capability enhances off-system connectivity, which is vital for developing low-power, high-speed operational frameworks in data centers and AI/machine learning systems.
Custom Solutions for High-Performance Applications
In high-performance application scenarios, the creation of a custom High Bandwidth Memory (HBM) base die using the latest UCIe standard represents a forward-thinking strategy. This method involves the tight integration of memory dies with compute dies, allowing for incredibly high bandwidth and efficient low latency interactions between components. This integration optimizes memory transactions, particularly in AI applications where power efficiency and reduced latency are key performance influencers.
Industry Recognition and Future Aspirations
Recognition from industry groups highlights the critical milestones achieved by UCIe Consortium members, such as successful tapeouts that illustrate the specification's growing acceptance. With UCIe as a foundational element in the chiplet industry, it fosters high-speed, low-latency interconnect solutions that accelerate innovation and shorten time-to-market for new technologies.
Alphawave Semi's Mohit Gupta emphasizes the importance of their developments: "The successful tapeout of our Gen2 UCIe IP at 36 Gbps on 3nm technology underscores our leadership in this space. It paves the way for the forthcoming Gen3 UCIe IP at 64 Gbps, which aims to fulfill critical bandwidth requirements, particularly in AI-centric applications, by 2025."
About Alphawave Semi
Founded in 2017 by a team of experts in semiconductor IP licensing, Alphawave Semi stands as a beacon in the realm of high-speed connectivity. The company's innovative technology addresses the pressing need for faster, more reliable data transmission with enhanced performance and efficiency. Alphawave's portfolio includes custom silicon, connectivity products, and a suite of silicon-proven connectivity IP subsystems tailored for hyperscaler and data-infra markets, powering areas like data centers, AI, and next-gen autonomous technologies.
Frequently Asked Questions
What is the significance of Alphawave's 64 Gbps UCIe IP?
Alphawave's 64 Gbps UCIe IP represents a major advancement in chiplet interconnect technology, offering high bandwidth density, low power, and low latency.
How does the new UCIe architecture improve connectivity?
The new architecture provides a scalable, robust design compliant with UCIe specifications, enabling advanced testing and monitoring capabilities.
Which industries can benefit from this innovation?
Industries such as high-performance computing, data centers, and artificial intelligence stand to gain significantly from this technology.
What role does optical technology play in UCIe?
Optical technology enhances the capability of UCIe to establish reliable, low-latency connections, especially for off-system connectivity.
How does Alphawave position itself in the market?
Alphawave is a leader in high-speed connectivity solutions, offering a full suite of silicon-proven connectivity IP for demanding applications across multiple sectors.
